Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems
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- Reza (2022) - Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems ā2024-04-08 !!2 rd citation link todoist nt:: Ā ā ā 2024-04-08 Zotero Link:: Zotero Files:: attachment Reading Note:: Web Rip:: url:: https://ieeexplore.ieee.org/document/9794707/
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Network-on-Chips (NoC) has been the superior interconnect fabric for multi/many-core on-chip systems because of its scalability and parallelism. On-chip network resources can be dynamically configured to improve the energy efficiency and performance of NoC. However, large and complex design space in heterogeneous NoC architectures becomes difficult to explore within a reasonable time for optimal trade-offs of energy and performance. Furthermore, reactive resource management is not effective in preventing problems, such as thermal hotspots, from happening in adaptive systems. Therefore, we propose machine learning techniques to provide proactive solutions within an instant in NoC-based computing systems. We present a deep reinforcement learning technique to configure voltage/frequency levels of NoC routers and links for both high performance and energy efficiency while meeting the global energy budget constraint. Distributed reinforcement learning agents technique has been proposed, where a reinforcement learning agent configures a NoC router and associated links intelligently based on system utilization and application demands. Additionally, neural networks are used to approximate the actions of distributed reinforcement learning agents. Simulations results for 256-core and 16-core NoC architectures under real applications and synthetic traffic show that the proposed self-configurable approach improves energy-delay product (EDP) by 30-40% compared to traditional non-machine-learning based solution.
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- Communication quickly outpaces computation in energy costs
- Focus on section C
- Seems like basic DRL stuff, but Iām failing to understand the specific parameters being optimized
- Like it is clearly optimizing the latency and energy, but what are the mechanics of that in the NOC exactly?