A million spiking-neuron integrated circuit with a scalable communication network and interface
Read:: - [ ] Merolla et al. (2014) - A million spiking-neuron integrated circuit with a scalable communication network and interface ➕2024-10-14 !!2 rd citation todoist Print:: ❌ Zotero Link:: Zotero Files:: Reading Note:: Web Rip:: url:: https://www.science.org/doi/abs/10.1126/science.1254642
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Inspired by the brain’s structure, we have developed an efficient, scalable, and flexible non–von Neumann architecture that leverages contemporary silicon technology. To demonstrate, we built a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses. Chips can be tiled in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well suited to many applications that use complex neural networks in real time, for example, multiobject detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 63 milliwatts.